My new #Introduction

I am building tiny real-time #Forth co-processors for MicroPython, Circuit Python and RISC-V. On FPGA's a stack machine can be 1/2 the size of a 32 bit RISC-V soft core.

#Forth, #MicroPython #CircuitPython #Riscv #StackMachine #FPGA #Verilog
#realtime

@tsalvo Just saw your work in progress on the stack #CPU implementation in #PipelineC . Great work, how neat! Hope it has gone well and as always happy to help! #uxn #varvara #AnaloguePocket #FPGA #stackmachine #FPGA #HDL https://github.com/tsalvo/varvara-fpga

I have created a Read The Docs site for Mecrisp Ice, which is a family of 16, 32 and 64 bit soft core Forth processors written in Verilog and based on the J1 stack machine.

https://mecrisp-ice.readthedocs.io

@Mecrisp #mecrisp #fpga #forth #j1 #stackmachine #readthedocs

@neauoire oh hecc- have you seen this??

https://www.math.ubc.ca/~cass/graphics/manual/